#include <atomictypes.h>
Atomic 16 bit integer template.
= Relaxed Ordering : Relaxed ordering means that stores to or loads from a memory location can be reordered by the CPU which means that other threads may observe a completely different order of loads and stores than what your thread seems to do.
= Acquire-Release Ordering : If another thread has released a store on a memory location it is guaranteed that after a load with acquire memory order all following loads will see the (relaxed) stores that preceded the release. Furthermore subsequent loads or stores will not be speculatively executed before this load.
= Sequentially Consistent Ordering : As the name implies operations with this ordering appear in the same order to other threads. This comes at the cost of relatively expensive synchronization between the CPU cores.
By default all memory accesses in C++ are relaxed, any write or read to a variable can be reordered by the CPU. Please note that even if your target CPU does not change the order of memory accesses the C compiler may do so. x86 style CPUs adhere to acquire-release ordering for most memory accesses as long as you don't make use of SSE/AVX. This means that multi threaded code without atomic variables appears to run just fine as long as the compiler doesn't reorder accesses. Of course this code might fail miserably on other platforms (e.g. ARM) or when a new compiler performs optimizations. Therefore you should use AtomicInt*/AtomicPtr for variables that are shared by different threads.
Public Types | |
| using | ValueType = T |
Public Member Functions | |
| MAXON_IMPLICIT | Atomic16 (T value=T()) |
| T | Get () const |
| void | Set (T newValue) |
| T | Load () const |
| void | Store (T newValue) |
| T | LoadRelaxed () const |
| void | StoreRelaxed (T newValue) |
| T | LoadAcquire () const |
| void | StoreRelease (T newValue) |
| T | LoadConsume () const |
| T | SwapAdd (T add) |
| T | SwapIncrement () |
| T | SwapDecrement () |
| Bool | TryCompareAndSwap (T newValue, T compare) |
| T | Swap (T newValue) |
Private Member Functions | |
| MAXON_DISALLOW_COPY_AND_ASSIGN (Atomic16) | |
Private Attributes | |
| T volatile | _value |
| using ValueType = T |
| MAXON_IMPLICIT Atomic16 | ( | T | value = T() | ) |
|
private |
| T Get | ( | ) | const |
Default routine to get an atomic value. It is identical to Load() with sequentially consistent memory order. Other routines might deliver improved performance.
| void Set | ( | T | newValue | ) |
Default routine to set an atomic value. It is identical to Store() with sequentially consistent memory order. Other routines might deliver improved performance.
| [in] | newValue | Value to be stored. |
| T Load | ( | ) | const |
Atomic load with sequentially consistent memory order.
| void Store | ( | T | newValue | ) |
Atomic store with sequentially consistent memory order.
| [in] | newValue | Value to be stored. |
| T LoadRelaxed | ( | ) | const |
Atomic load with relaxed memory order. This load is completely unordered (might be prefetched). You should only use it within the same thread when guarded with preceding acquire load or a fence. Fences are implicitly created by TryCompareAndSwap, Swap, SwapAdd, SwapIncrement, SwapDecrement and by locks.
| void StoreRelaxed | ( | T | newValue | ) |
Atomic store with relaxed memory order. This store is completely unordered. You should only use it within the same thread when guarded by a following release store or a fence.
| [in] | newValue | Value to be stored. |
| T LoadAcquire | ( | ) | const |
Atomic load with acquire memory order. If another thread has released a store on this location it is guaranteed that after a load with acquire memory order all following loads will see the (relaxed) stores that preceded the release. Furthermore subsequent loads or stores will not be speculatively executed before this load. This is equivalent to a relaxed load followed by a MemoryFenceAcquire().
| void StoreRelease | ( | T | newValue | ) |
Atomic store with release memory order. As soon as another thread reads on this location using LoadAcquire() and obtains the stored value it is guaranteed that all prior (relaxed) stores are visible to it. This is equivalent to a MemoryFenceRelease() followed by a relaxed store.
| [in] | newValue | Value to be stored. |
| T LoadConsume | ( | ) | const |
Atomic load with consume memory order. If another thread has released a store on this location it is guaranteed that after a load with consume memory order that reads the value stored direct dependencies are synchronized (e.g. if the value is a pointer to a structure you can safely access the elements of the structure that have been written before the release). This means that unrelated loads following this method might be reordered by the compiler or the CPU and can be executed before it. For most CPU architectures this the same instruction as an ordinary load which implies no performance penalty compared to a load with relaxed memory order.
| T SwapAdd | ( | T | add | ) |
Atomic add with sequentially consistent memory order. Adds the specified value to the memory location and returns the previous value. This call enforces a sequentially consistent memory order which means that it might require potentially expensive synchronization between the CPUs.
| [in] | add | Value to be added. |
| T SwapIncrement | ( | ) |
Atomic increment with sequentially consistent memory order. Increments the value of the memory location and returns the previous value. This call enforces a sequentially consistent memory order which means that it might require potentially expensive synchronization between the CPUs.
| T SwapDecrement | ( | ) |
Atomic decrement with sequentially consistent memory order. Decrements the value of the memory location and returns the previous value. This call enforces a sequentially consistent memory order which means that it might require potentially expensive synchronization between the CPUs.
| Bool TryCompareAndSwap | ( | T | newValue, |
| T | compare | ||
| ) |
Atomic compare and swap with sequentially consistent memory order. If the previous memory location value equals compare newValue is written to the memory location and true is returned. If the memory location contained a different value it is not changed and false will be returned. If the value is exchanged this call enforces a sequentially consistent memory order which means that it might require potentially expensive synchronization between the CPUs.
| [in] | newValue | Value to be stored if memory location contains compare. |
| [in] | compare | Value to compare with memory location. |
| T Swap | ( | T | newValue | ) |
Atomic swap with sequentially consistent memory order. Exchanges the value of the memory location with newValue and returns the previous value. This call enforces a sequentially consistent memory order which means that it might require potentially expensive synchronization between the CPUs.
| [in] | newValue | Value to be stored. |
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private |